Cisco Interview Questions

Answered by: revathi on: Apr 24th, 2012

AB + A( B + C ) + B ( B + C ) = AB+AB+AC+B2+BC = (2AB+B2)+AC+BC = [(A+B)2-A2]+C(A+B) ...

Answered by: Nitish Sharma on: Sep 13th, 2011

AC+B

Answered by: sumit on: Jan 27th, 2012

The most important advantage of CMOS is the very low static power consumption in compare technology.

Answered by: shikha bansal on: Jan 3rd, 2012

CMOS provides more noise margin than NMOS.

Answered by: gopala krishna on: Nov 9th, 2011

ALE stands for Address Latch Enable. It is the 3oth pin of 8085 which is used to enable or disable the address bus. the address bus will be enabled during the 1st clock cycle as the ALE pin goes high ...

Answered by: Abhinav Prateek on: Aug 22nd, 2007

ALE( Address Latch Enable)this is a signal which goes HIGH everytime 8085 begins an operation. it indicates that the bits on AD0 to AD7 are address bits. this signal is mainly used to latch the low or...

Answered by: Prakash on: Oct 21st, 2011

for gray 1 pixel = 1 byte. for color 1 pixel = 3 byte; 64kbps =64 kilo bit per sec; 64kbps= 64/8 kilo byte per sec= 8000 byte per sec; so 540 gray pixels, time=540/8000=0.067sec; for color 540 pixels...

Answered by: vengat86 on: Aug 18th, 2009

In transmission its considered as download and upload so, we have 64kbps  Divide by 8 to get the download speed so its 8kbps ie 8192 bits per sec Now consider the image its 540Bytes convert ...

Answered by: Atul on: Oct 18th, 2011

In digital communications, an extra bit is sometimes appended to the message to make the ‘logic high’ bit count even or odd. This extra bit is know as parity bit and used for error detection. Re...

Answered by: sherina on: Sep 18th, 2011

Parity bits are extra signals which are added to a data word to enable error checking. There are two types of Parity - even and odd.

Answered by: Nilesh Trimbake on: Oct 5th, 2011

Multiply by 8 and then convert to HexaDecimal

Answered by: nishanth on: Jul 18th, 2006

003c

Answered by: raval vikram on: Sep 16th, 2011

16 bit

Answered by: karam_sodhi@yahoo.com on: Sep 11th, 2011

-128 to +127

Answered by: Maharasi.V on: Aug 13th, 2010

If the input is 0, previous state is maintained and if the input is 1, toggling operation occurs.

Answered by: Arun Segaran on: Nov 2nd, 2007

It becomes a T-flip flop

Answered by: muthumlk on: Aug 4th, 2010

For an SR latch, if S is in ON state, the latch is set. So the o/p is 1 and the latch is in ON state.

Answered by: Gopi on: Jun 1st, 2005

Latch state is in high state( ouput Q = 1).

Answered by: nikhil4nigam on: Jul 31st, 2010

Since NAND and NOR are the universal gates, hence the logics can be implemented simply by using NAND or NOR gate.

Answered by: pushpalathakrishnan on: Jul 29th, 2010

Using OR gate, if any one of the inputs A, B and C are 1 the output of OR gate is 1. In case of AND gate, the output of AND gate is 1 only if all the three inputs A,B and C are all set to 1.

Answered by: prabhat1988 on: Jun 12th, 2010

LIFO is the right answer, Practically we see STACK is keeping number of CDs on each other in that scenario the last CD we kept in a box will be out first but in queue the person who is first in a queu...

Answered by: Jagadish on: Apr 20th, 2007

When you stack up objects say plates, first plate which goes at the bottom of the stack can only be removed last.

FILO ( First In Last Out)

Answered by: seemak on: Apr 9th, 2010

It is OR gate.

Answered by: hellslayer on: Nov 10th, 2009

NAND gate with negative logic becomes a NOR gate with positive logic.

Answered by: adityajain on: Nov 21st, 2009

Voice signal is sampled at 8000 samples per second. (Human voice is in the range of 300Hz-3400Hz, and according to nyquist sampling rate we take it more than double the rate).For a 4  min. voice ...

Answered by: geekijk on: Aug 28th, 2008

banwidth of signal=4Hzaccording to niquist theorem sampling frequency>=2*bandwidthso sampling freq=2*4Hz(8 samples /sec)1 samples is stored as 1 byteso 8*8 bits/secso for 4 mins bits are = (4*60)*(...

Answered by: sachinnitw on: Nov 7th, 2009

Icb increases with temperature.

Answered by: Ramachandran P.R on: Apr 30th, 2006

what ever may be the temprature change there will not be any collector to base current

Answered by: japan_dave88 on: Aug 20th, 2009

I would say that it also depends on length of the link as suppose Two devices named A and B are located 1000 kilometer far and we have link of 64kbps. Than when A will start sending first bit of ...

Answered by: shreekanthss on: Feb 2nd, 2009

Suppose a pixel is represented by 8 bits. Then total size=540*8=4320bits
It takes 4320/64000=0.0675 seconds

Answered by: Arun Segaran on: Nov 2nd, 2007

Not many synthesis tools are available to synthesize a asynchronous design at RTL 

Answered by: swatias on: Jan 11th, 2007

To avoid race effects and deadlock effect, synchronous circuits are used

Answered by: reddy on: Oct 31st, 2007

The use of capacitor circuits instead of logical gates as in static RAMs demand the refreshing circuits.
The charging and discharging of capacitors while storing bits could cause errors.

Answered by: yogeshforever on: Aug 4th, 2007

DCE stannds for data communication end. In compouter  world  a modem is a DCE device.DTE stands for data terminal equipment. It serves as the originators and receptors of the digital communication.Fo...

Answered by: bashwin.87 on: Feb 12th, 2007

u can think DCE as a modem & DTE as a system

Answered by: rajeev kumar on: Feb 7th, 2007

locality of reference means refering a particular area of memory while allocating variables.Whenever we allocate variables they are stored in a particular area this phenomenon is called locality of re...

Answered by: vijay on: Dec 14th, 2006

Definition of: locality of reference Also known as "locality in space" and "spatial locality," it refers to the fact that most instructions in a program are in routines that are executed over and over...