Micro Processor Interview Questions

Stack uses LIFO. Example for LIFO is collection of coins arranged one by one.

The operation is dependent upon the microprocessor and the stack operation is simplified as first in last out(filo)

D7CH.

ANS: FA3H:: msb remains same. retst is obtained by xoring the consecutive bits.

RST 7.5 - Maskable - Vector - 003C (H) - Edge triggered RST 6.5 - Maskable - Vector - 0034 (H) - Level triggered RST 5.5 - Maskable - Vector - 002C (...

Multiply by 8 and then convert to HexaDecimal

LIFO

Address latch enable is used for combining lower order address byte to higher order address byte

AB+AB+AC+BB+BC
AB+AC+B+BC
AB+AC+B(1+C)
AB+AC+B
AB+B+AC
B(A+1)+AC
B+AC

Perfect ans:

B+AC

bt practically i required 1.07 mb to record 1.31 min speech,
any1 kno its calculation?

Voice signal is sampled at 8000 samples per second. (Human voice is in the range of 300Hz-3400Hz, and according to nyquist sampling rate we take it more than double the rate).

For a 4  min. voice signal, we have

Memory = 4*60*8000 Bytes = 1875KB = 1.83 MB.

NOR gate

It is OR gate.

physical address :: is the real address stored in the system itself and this 48 bit flat address works in layer1 of osi model... logical address:: is the 32bit address assigned to each system in a ne...

Physical address stored temporary in database But logical address it can store data in database in permanently.

Real mode is the mode where the base instruction set of 8086 microprocessor family can be executed , whereas in the Protected mode ,the instruction set with new and advanced instructions of the microp...

The most important advantage of CMOS is the very low static power consumption in compare technology.

CMOS provides more noise margin than NMOS.

for gray 1 pixel = 1 byte.
for color 1 pixel = 3 byte;
64kbps =64 kilo bit per sec;
64kbps= 64/8 kilo byte per sec= 8000 byte per sec;
so 540 gray pixels, time=540/8000=0.067sec;
for color 540 pixels, time= 540*3/8000=0.202 sec;

In transmission its considered as download and upload

so, we have 64kbps 

Divide by 8 to get the download speed so its 8kbps ie 8192 bits per sec

Now consider the image its 540Bytes convert into bits its 540*1024 = 552960

So divide both 552960 / 8192 = 67.5 sec

i.e., 1 min 7 secs

In digital communications, an extra bit is sometimes appended to the message to make the logic high bit count even or odd. This extra bit is know as parity bit and used for error detection.

Reference :- http://www.fullchipdesign.com/parity_generation_checking.htm

Parity bits are extra signals which are added to a data word to enable error checking. There are two types of Parity - even and odd.

16 bit

-128 to +127

If the input is 0, previous state is maintained and if the input is 1, toggling operation occurs.

It becomes a T-flip flop

For an SR latch, if S is in ON state, the latch is set. So the o/p is 1 and the latch is in ON state.

Latch state is in high state( ouput Q = 1).

Since NAND and NOR are the universal gates, hence the logics can be implemented simply by using NAND or NOR gate.

Using OR gate, if any one of the inputs A, B and C are 1 the output of OR gate is 1. In case of AND gate, the output of AND gate is 1 only if all the three inputs A,B and C are all set to 1.