venkatesan
Answered On : Apr 30th, 2005
In 8085 there is one common bus for data memory as well as program memory.
ale is used to select the bus as address and data bus
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dfhhhhhhh
Answered On : Jul 15th, 2005
uses bus as address and data bus
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vignyan
Answered On : Aug 22nd, 2005
Address Latch Enable is used for multiplexing higher order address bus and the data bus
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smokindesi
Answered On : Oct 9th, 2006
used to acess external memory.
also used in 8051 and compatible microcontrollers
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ALE controls the set of latches or flipflops in 8085
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hardik parikh
Answered On : Oct 27th, 2006
hi, i think it is ALU. and it is arithmetic logical unit, which is used by processor to compute many arithmetic & logical function by it. a part of processor.
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Rana Debnath
Answered On : Nov 25th, 2006
Address latch enable: This is a positine going pulse generated every time the 8085 begins an operation(machine cycle);it indicates that the bits on AD7-ADo are address bits.This signal is used primarily to latch the low -order address from multiplexed bus and generate a separate set of eight address lines,A7-Ao.
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Guest
Answered On : Jan 17th, 2007
ALE is an active high pin. When we supplied active high pulse to this pin, this pin is activated. When this pin is activated, it de-multiplexes lower address bus (A0-A7) from lower address / data bus (AD0-AD7).
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Abhinav Prateek
Answered On : Aug 22nd, 2007
ALE( Address Latch Enable)
this is a signal which goes HIGH everytime 8085 begins an operation. it indicates that the bits on AD0 to AD7 are address bits.
this signal is mainly used to latch the low order address from the multiplexed bus.

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gopala krishna
Answered On : Nov 9th, 2011
ALE stands for Address Latch Enable. It is the 3oth pin of 8085 which is used to enable or disable the address bus. the address bus will be enabled during the 1st clock cycle as the ALE pin goes high i.,e logic '1' during the first half cycle. During 2nd and 3rd clock cycles it goes low i.,e logic '0' indicating the the address & data bus (AD0-AD7) is for data. hence it disables the address & data bus during the 2nd and 3rd clock cycles.

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arvinth ram
Answered On : Aug 8th, 2012
Address latch enable is used for combining lower order address byte to higher order address byte
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swetha
Answered On : Dec 12th, 2012
LIFO
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