which of the following architectures is/are not suitable for realizing SIMD ? 1. vector processor 2. array processor 3. von neumann 4. both array processor and von neumann
in a ripple counter using edge-triggered JK flip-flop. the pulse input is applied to the 1. clock input of oll flip-flops 2. clock input of one flip-flop 3. J and K input of one
Latest Answer: clock input of one flipflop ...
In a ripple counter using edge-triggered JK flip-flop. the pulse input is applied to the 1. clock input of oll flip-flops 2. clock input of one flip-flop 3. J and K input of
Latest Answer: The first flip flop is clocked and the rest are clocked from their previous flip flop's output. ...
Motorola's 68040 is comparable to 1. 8085 2. 80286 3. 80386 4. 80486
Latest Answer: the answer is 80486 ...
If a clock with time period 'T' is used with 'n' stage shift register, the output of the final stage will be delayed by 1. nT seconds 2. (n-1)T seconds
Latest Answer: nT seconds ...
If the input J is connected through K input of J-K flip-flop, the flip-flop will behave as a 1. D(Delay) type flip-flop 2. T-type flip-flop 3. Toggle Switch 4. 2 or 3 above
Latest Answer: It acts as T type Flip-Flop ...
Which of the following is not an input device 1. MICR 2. OCR 3. DVD 4. JOYSTICK
Latest Answer: But I think it is DVD ...
Which of the following is is used to hold ROM and RAM cards 1. Computer Bus 2. Expansion cards 3. Mother Board 4. Cache memory
Latest Answer: 3. Mother Board ...
A computer system has 4k word cache organised in a block-set-associativemanner, with 4 blocks per set,64 words per block. The number of bits in theSET and WORD fields of the main memory address format
Consider a computer with 8M bytes of main memory and a 128K cache. The cache block size is 4K. It uses a direct mapping scheme for cache management. How many different main memory blocks can map onto a
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