This question can be answered at two levels.

+ First, what is memory and IO mapped IO?? Advts and disadvts, etc

+ Why were they invented?? I.e. a Comp Arch History Perspective

Both methods are used to communicate with IO peripherals connected to a CPU.

IO mapped IO uses special instructions in the ISA to work with IO devices: to transfer data to IO devices as well as to control them. This scheme is generally found in Intel processors. The instructions are IN and OUT instructions. These instructions can read and write one byte at a time to an IO device.

Pros

+ Solves the limited memory addressability problem as no memory address range needs to be set aside for IO space.

+ Separate IO bus => no performance impact to memory traffic

Cons

+ Substantially slower than memory-mapped IO due to strict ordering(consistency) requirements.

+ CPU chip design needs to support IO port logic

+ IN/OUT are assembly instructions i.e. cannot be programmed in a high level language like C, without using nasty macros.

+ Limited IO port space

There is a protocol followed in hardware when a CPU wants to read a byte from a virtual address that it generates. The protocol goes something like this:

+ On the address bus, CPU places the virtual address.

+ On the control bus, a READ(LOAD) or a WRITE(STORE) is placed.

+ On the data bus, for a Store, the data to be stored in memory is placed and the CPU waits.

+ When the memory operation is done, CPU has got the data.

If the same protocol above can be followed by an IO device, then the CPU can address IO devices just like any memory location.  

Memory mapped IO maps the device (device memory and device control registers) into the CPU address space, just like the CPU maps physical memory. This leads to a uniform addressing mechanism, whether the target address is a memory location OR an IO device && also note that the same bus is used for both memory and IO traffic. But, the memory and IO address ranges have to be separate. I/O devices monitor the CPU's address bus for an IO address && respond back if the address matched the device-assigned address. 

Pros

+ Uniform memory addressing scheme: CPU chip design can throw out IO Port logic

+ Easily programmable in a high level language like C. We can use things like memcpy(), etc.

+ Much much faster than IO mapped IO (100x)

+ Huge address space compared to limited IO port space

+ Most CPU memory addressing modes now available to IO space access also.

Cons

+ Memory and IO bus share same buses (address and data bus) i.e. may need a separate IO bus to divert IO traffic.

When life began for CPUs, we had limited memory addressability. Setting aside some of it for IO space was difficult, especially as IO space consumption increased. So, separate memory and IO address spaces were invented. But, a portion of the ISA (Instruction Set Architecture) Op code space had to be reserved for IO space operations. This was okay as the no of opcodes in an ISA were also small, when life began. Separate IO space was also accompanied by a separate IO bus i.e. memory and IO operations did not impact each other directly. 

But, life started getting complicated for CPUs. Memory addressability increased over time, and setting aside some IO space in the memory addressability range was no longer a problem. So, we now could address both memory locations and IO devices through the same protocol, with the only restriction that memory and IO address space had to be mutually exclusive ranges. Since both memory locations and IO devices are addressed using the memory bus, there is a potential for impacting performance for each other. But, this is usually mitigated by a separate IO bus.