They are recruiting for ASIC....there were 8 questions....50 marks....first 7 questions were from digital electronics....1)Match the following:based on clock skew....poles and zeros..IIR FIR filter2)was simple....implementation of an expression using MUX3)Had to find the max. freq. of a ckt....with skew,setup and hold time given4)Draw the state diagram for a divide by 5 ckt....Find the no. of states...Generalize it for divide by N...Ans.there are N-1 states5)One question where in the areas occupied
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Latest Answer: Do you have any information about their questions for ASIC design positions?If you happen to have, could you please send me one copy? ...
